| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_099413ae0cf5a2b6398b5151766cd260 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F2001-136222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-13629
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F2001-134372
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-134372
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136209
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F2001-13629 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-124
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136286
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1365 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1343 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1362
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1365 |
| filingDate |
2018-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2020-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a3af748bca188ad5f2f951332f409a15
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2f70da0834aacc705b88126949a09a66 |
| publicationDate |
2020-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10825841-B2 |
| titleOfInvention |
Thin film transistor array panel and a method for manufacturing the same |
| abstract |
A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11462571-B2 |
| priorityDate |
2005-08-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |