| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_af4cc10d515454e59278de7445531247 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76251
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02052
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14632
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76254
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02581 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-324
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 |
| filingDate |
2019-08-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2020-10-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d74eb4a2901d4ce5975fc66d4c9b8811
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_485d574bfc14c8f279988a716b1ad35a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_813f07d22beba37f47c14286542d8d6b |
| publicationDate |
2020-10-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10818539-B2 |
| titleOfInvention |
Manufacturing method of smoothing a semiconductor surface |
| abstract |
A method is provided for preparing semiconductor structure, e.g., a semiconductor on insulator structure, comprising a device layer having a smooth surface. The method provided involves smoothing a semiconductor substrate surface by making use of stress enhanced surface diffusion at elevated temperatures. The purpose of this method is to reach atomic scale surface smoothness (for example, smoothness in the range of between 1.0 and 1.5 angstroms as measured according to root mean square over a 30 um×30 um AFM measurement), which is required in advanced (sub 28 nm) CMOS device fabrication. |
| priorityDate |
2015-11-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |