| abstract |
Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends along the stack. Conductive segments are along the wordline levels. Each of the conductive segments has, along a cross-section, first and second ends in opposing relation to one another. The conductive segments include gates and wordlines adjacent the gates. The wordlines encompass the second ends, and the gates have rounded (e.g., substantially parabolic) noses which encompass the first ends. Some embodiments include methods of forming integrated assemblies. |