http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10726905-B2

Outgoing Links

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4091
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4091
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filingDate 2018-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2020-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fb39e6d31e09cd80bb21f34cad5bb2e2
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_63083918842e799e060712a60968d035
publicationDate 2020-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-10726905-B2
titleOfInvention Memory device with improved writing features
abstract The present invention relates to a method of performing a write access phase for a memory device and comprising:n transferring a write data from a local input and output line to a bit line to write the data into a memory cell via the bit line by activating a column switch provided between the bit line and the local input and output line during a first period; and transferring a read data read out from the memory cell to the local input and output line via the bit line by activating the column switch during a second period; wherein the first period is longer than the second period.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11043255-B2
priorityDate 2018-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 25.