| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_33cf281df1fdf76b7da1bb88a75ba80d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0289
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0286
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0283
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3688
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2330-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3275
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0267 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3677
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3266
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-2092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-20 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-3275 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-3266
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C19-28 |
| filingDate |
2018-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2020-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9368b97d8481f3269cac6fe1ffeaa2e7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4a99748b199516c44d07a1632207fe83 |
| publicationDate |
2020-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10726764-B2 |
| titleOfInvention |
Shift register and display device comprising the same |
| abstract |
A bi-directional shift register can include a plurality of stages, an Nth stage among the plurality of stages including a first switching unit configured to receive a forward driving signal and a reverse driving signal, and control a Q-node; a second switching unit configured to receive an (N+2)th clock signal, and control a QB-node; a third switching unit configured to discharge the QB-node to a low-level voltage when the Q-node is charged to a high-level voltage, and discharge the Q-node to the low-level voltage when the QB-node is charged to the high-level voltage; and an output unit configured to output an Nth clock signal to an output terminal based on a voltage at the Q-node, in which the forward driving signal is an output signal from an (N−1)th stage or a forward start signal from an external source external to the shift register, and the reverse driving signal is an output signal from the (N+1)th stage or a reverse start signal from the external source. |
| priorityDate |
2017-11-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |