| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_7352bbc0586b15f23df2f6bd5bf8784c |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11568
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1203
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66833
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-408
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40117
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7926 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11568
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792 |
| filingDate |
2018-05-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2020-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c57f58ef2e665ce7e3d74ffe47f37867
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_32a368fb8f499d28612c8ace72f7bb8d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f6bd0eaaaff1b41c9e49ff4893cf9fcb |
| publicationDate |
2020-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10707224-B2 |
| titleOfInvention |
FinFET vertical flash memory |
| abstract |
A plurality of fin structures containing, from bottom to top, a non-doped semiconductor portion and a second doped semiconductor portion of a first conductivity type, extend upwards from a surface of a first doped semiconductor portion of the first conductivity type. A trapping material (e.g., an electron-trapping material) is present along a bottom portion of sidewall surfaces of each non-doped semiconductor portion and on exposed portions of each first doped semiconductor portion. Functional gate structures straddle each fin structure. Metal lines are located above each fin structure and straddle each functional gate structure. Each metal line is orientated perpendicular to each functional gate structure and has a bottommost surface that is in direct physical contact with a portion of a topmost surface of each of the second doped semiconductor portions. |
| priorityDate |
2014-10-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |