Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8b79b8ddfb59e5657df050f8998d1d33 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-268 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-304 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02378 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53209 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-45 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-324 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1608 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2855 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0485 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-268 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-304 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-324 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-45 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285 |
filingDate |
2018-11-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2020-05-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1b1e2288c97f29bf7ea9ae41501102f4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_49eda6c6fef64e5090eb491cc7387f8c |
publicationDate |
2020-05-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-10665680-B2 |
titleOfInvention |
Method and assembly for ohmic contact in thinned silicon carbide devices |
abstract |
A silicon carbide semiconductor assembly and a method of forming a silicon carbide (SiC) semiconductor assembly are provided. The silicon carbide semiconductor assembly includes a semiconductor substrate and an electrode. The semiconductor substrate is formed of silicon carbide and includes a first surface, a second surface opposing the first surface, and a thickness extending therebetween. The method includes forming one or more electronic devices on the first surface and thinning the semiconductor substrate by removing the second surface to a predetermined depth of semiconductor substrate and leaving a third surface opposing the first surface. The method further includes forming a non-ohmic alloy layer on the third surface at a first temperature range and annealing the alloy layer at a second temperature range forming an ohmic layer, the second temperature range being greater than the first temperature range. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11282927-B2 |
priorityDate |
2017-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |