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Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b6caea61bfde8a45e01a8deabff80d97 |
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-41
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
| classificationCPCInventive |
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02337
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-518
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1157
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-11524
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0922
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-1157
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115
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| filingDate |
2018-05-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2019-07-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9b33363e6fb504f5973bb00c853d4d07
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_865dfa4ca01bc874cdc0fd1a283dbb89
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_17f8b24c33fd6e096a5bad3e6a8de63d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9142497ce2af4d6de898f0a8b9a7dd23
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_995d7eb2fafadedf5380595839e4405d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f95e9c19938726065a294e24b40e6aea |
| publicationDate |
2019-07-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10355100-B1 |
| titleOfInvention |
Field effect transistors having different stress control liners and method of making the same |
| abstract |
A first field effect transistor and a second field effect transistor are formed on a substrate. A silicon nitride liner is formed over the first field effect transistor and the second field effect transistor. An upper portion of the silicon nitride liner is converted into a thermal silicon oxide liner. A lower portion of the silicon nitride liner remains as a silicon nitride material portion. A first portion of the thermal silicon oxide liner is removed from above the second field effect transistor, and a second portion of the thermal silicon oxide liner remains above the first field effect transistor. Selective presence of the silicon oxide liner provides differential stress within the channels of the first and second field effect transistors, which can be employed to optimize performance of different types of field effect transistors. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11450768-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022265685-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11626496-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022278209-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11710740-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11393757-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11508749-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11349014-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022108623-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11652155-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022285530-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11004974-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2021408266-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111933642-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11575015-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10910020-B1 |
| priorityDate |
2018-05-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |