| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7684
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16145
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15311
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-181
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00012
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5384
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76838
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76885 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-538 |
| filingDate |
2017-02-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2019-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_411b1a4d763fdaae4f6ce0d6d709eb90
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e20fb71c7bdd9233e18ac24848a1bb95
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b7f5b49b55f3fa9eef40d79ceb4c4aae |
| publicationDate |
2019-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10340204-B2 |
| titleOfInvention |
Semiconductor devices having through electrodes and methods for fabricating the same |
| abstract |
The semiconductor device includes a substrate including an integrated circuit and a contact that are electrically connected to each other, an insulation layer covering the substrate and including metal lines, and a through electrode electrically connected to the integrated circuit. The insulation layer includes an interlayer dielectric layer on the substrate and an intermetal dielectric layer on the interlayer dielectric layer. The metal lines include a first metal line in the interlayer dielectric layer and electrically connected to the contact, and a plurality of second metal lines in the intermetal dielectric layer and electrically connected to the first metal line and the through electrode. The through electrode includes a top surface higher than a top surface of the contact. |
| priorityDate |
2016-03-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |