| abstract |
A wafer level chip packaging method, comprising: 1) providing a carrier and forming a bonding layer on a surface of the carrier; 2) forming a dielectric layer on a surface of the bonding layer; 3) attaching each of semiconductor chips, with its front face facing down, to a surface of the dielectric layer; 4) packaging each of the semiconductor chips by using an injection molding process; 5) separating the bonding layer and the dielectric layer to remove the carrier and the bonding layer; 6) forming a redistribution layer for the semiconductor chips based on the dielectric layer; and 7) performing a reballing reflow process on the redistribution layer to form micro bumps. As a result, contamination in the semiconductor chips from the packaging process is greatly controlled, thereby improving the rate of finished products and the electrical property of the semiconductor chips. |