| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bf83328d853bc7476ca10212837b3a01 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0653 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7824
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66681
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0865
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0882
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1095
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0653 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 |
| filingDate |
2017-03-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2018-07-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_da3ec9aba2e9a03cad5c2c6556b83a59 |
| publicationDate |
2018-07-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10032905-B1 |
| titleOfInvention |
Integrated circuits with high voltage transistors and methods for producing the same |
| abstract |
Integrated circuits and methods of producing integrated circuits are provided. In an exemplary embodiment, an integrated circuit includes a substrate and a gate overlying the substrate. A drain is defined within the substrate, where the drain and the gate are separated by a drain distance. A source is defined within the substrate adjacent to the gate, wherein the source is divided into two or more source sections. |
| priorityDate |
2017-03-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |