| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f56b5174f7d196258707ccf1d609796e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42368 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-404
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-402
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-407
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0619
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-405
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-017509
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7816
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0175 |
| filingDate |
2015-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2018-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8e0c67a05a55264512718d6f6260e8c3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5024a5ca37f7ac363e6cabd9b92f59de
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dfe8e7da75989c42c4988a2722b07c79
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_77741f1238a9d4202121a5f8d82b4227 |
| publicationDate |
2018-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10008561-B2 |
| titleOfInvention |
Semiconductor device |
| abstract |
A semiconductor device including a first circuit region in which a first circuit whose power supply potential is a first voltage is formed; a second circuit region in which a second circuit whose power supply potential is a second voltage lower than the first voltage is formed a separation region which separates the first circuit region from the second circuit region; and a transistor which is located in the separation region and couples the second circuit to the first circuit and whose source and drain are of a first conductivity type, the separation region including an element separation film; a first field plate which overlaps with the element separation film in plan view; a plurality of conductive films which are provided over the first field plate. |
| priorityDate |
2014-03-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |