| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fa907cbef2178b7f30a042518be6b17b |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-08145
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-80896
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-80895
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06548
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-80357 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-35
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-35
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-40 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8239
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11521 |
| filingDate |
2020-10-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2021-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_97a67f51153339e2026ee3f324aa5de0 |
| publicationDate |
2021-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-I742886-B |
| titleOfInvention |
Three-dimensional memory device with stable structure between storage blocks and method for forming the same |
| abstract |
Embodiments of a 3D memory device and a method for forming the same are disclosed. In an example, a 3D memory element includes a plurality of storage blocks in a plan view, and at least one stabilizing structure extending transversely in plan view to separate adjacent ones of the storage blocks. Each of the storage blocks includes a storage stack including vertically staggered conductive layers and first dielectric layers, and a plurality of channel structures each extending vertically through the storage stack. The stable structure includes a dielectric stack including a vertically staggered second dielectric layer and a first dielectric layer. |
| priorityDate |
2020-08-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |