| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b2d32a1324eb3a240649ffee8d475d63 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16148
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06544
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-812 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-16
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5383
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76832
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5283
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-81
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76805
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-0657 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-56
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-535 |
| filingDate |
2019-01-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2019-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2ad1529bddff4ce70dc12fca863efc21 |
| publicationDate |
2019-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-I680557-B |
| titleOfInvention |
Semiconductor packaging structure and preparation method thereof |
| abstract |
The present disclosure provides a semiconductor package structure and a manufacturing method thereof. The semiconductor package structure includes a first substrate, a second substrate, an interconnect structure disposed between the first substrate and the second substrate, and a plurality of through structures that penetrate the first substrate and a portion of the interconnect structure. A first TSV conductor and a plurality of second TSV conductors penetrating the first substrate and a portion of the interconnect structure. The interconnect structure includes a dielectric structure, a plurality of first connection layers, and a plurality of ring-shaped second connection layers disposed in the dielectric structure. At least one of the plurality of first TSVs is in contact with one of the first connection layers. At least one of the plurality of through-silicon via conductors is in contact with one of the ring-shaped second connection layer and the other of the first connection layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11488840-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I757059-B |
| priorityDate |
2018-11-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |