http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I674585-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c63bc5ef3ae590b0603de4587961cac3 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-408 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-783 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-40611 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4085 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-406 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-76 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C8-18 |
| filingDate | 2014-12-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2019-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a4be30cb7524ce7b5ff6ccad2bf5e7e2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c972802f4efb61c85f351f3bed36faa8 |
| publicationDate | 2019-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-I674585-B |
| titleOfInvention | Address generating circuit and memory device having the address generating circuit |
| abstract | The invention discloses that an address generating circuit includes a first latch unit, which is suitable for latching a bit address. The address is obtained by inverting a part of an input address; a second latch The unit is adapted to latch a partially inverted input address of the first latch unit, and is adapted to latch an plus / minus address after a first refresh operation during a target refresh cycle; a The third latch unit is adapted to latch a partial reverse input address of the first latch unit during a period other than the target refresh period; and an addition / subtraction unit is adapted to The plus / minus address is generated by adding / subtracting a predetermined value to / from the latched address in the second latch unit. |
| priorityDate | 2014-07-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 32.