Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bce787970b69aeb08d159e7c101c9ed7 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32091 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53295 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30604 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02068 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76846 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-488 |
filingDate |
2015-05-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2019-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d04be56a9d142d17374c31321a508079 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ef8cf4cd33d98fa4ec1254657b946c03 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3dde0112a885e960a22e6c3d10dc8b59 |
publicationDate |
2019-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-I660458-B |
titleOfInvention |
Protective through-hole cover for improved interconnect performance |
abstract |
An exemplary method of forming a semiconductor structure may include etching a via to penetrate the semiconductor structure to expose a first circuit layer interconnect metal. The method may include forming a material layer on the exposed first circuit layer interconnect metal. The method also includes forming a barrier layer within the through hole and having a minimal covering along the bottom of the through hole. The method additionally includes forming a second circuit layer interconnect metal on the material layer. |
priorityDate |
2014-05-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |