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filingDate 2015-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2019-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9aad25a41efeb82771b24352cf65d31e
publicationDate 2019-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-I660352-B
titleOfInvention Memory system and its operation method
abstract The invention discloses a memory system including: a first memory device including a first input / output buffer; a second memory device including a second input / output buffer; and a fast memory device. A memory is adapted to selectively and temporarily store first and second data to be programmed in the first and second memory devices, respectively. The first data is programmed into the first memory device in the first program section using the cache memory stored in a first exclusive section of the first program section, and the second data Programming to a second memory device in the second program section using the cache memory stored in a second exclusive section of a second program section only, the first exclusive section and the The second exclusive sections are set so as not to overlap each other.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I716993-B
priorityDate 2015-02-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 31.