Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-044 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-042 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2380-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-0295 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-043 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2203-04102 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0876 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0842 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0412 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-041 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-04182 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3233 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-04166 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L51-50 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05B33-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R19-255 |
filingDate |
2015-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2019-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a2dd7e8962533ce279af427298f32941 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d4d9be286624dc55ccecf0a4f6e26e04 |
publicationDate |
2019-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-I655442-B |
titleOfInvention |
Input/output device |
abstract |
One aspect of the present invention provides a circuit that detects an output current from a pixel and an output current from an input device and converts them into data. One aspect of the present invention provides a current detection circuit including: an integrating circuit; a comparator; a counter; and a latch. The integration circuit can integrate the potential of the first signal within a period determined by the second signal and output it as a third signal. The comparator can compare the potential of the third signal with the first potential, and output a fourth signal. The counter can output the number of pulses included in the fifth signal as the sixth signal within a period determined by the fourth signal. The latch is capable of holding the sixth signal. The integration circuit preferably includes an operational amplifier and one or more capacitor elements. The first signal is supplied from a pixel included in the display device or an input portion included in the input device. |
priorityDate |
2014-05-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |