| abstract |
The invention improves the performance of a semiconductor device. The semiconductor device of the present invention includes an SOI substrate SB1 and a MISFETQ1 formed on the SOI substrate SB1. The SOI substrate SB1 includes a base SS1, a ground plane region GP formed on the base SS1, a BOX layer 3 formed on the ground plane region GP, and an SOI layer 4 formed on the BOX layer 3. The substrate SS1 is made of silicon, and the ground plane region GP includes a semiconductor region 1 made of silicon carbide. |