| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66969
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78693
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-324
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-045 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2012-03-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2018-05-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f7704ba557cbe048a15ed797336e513a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_98a50d21ceba6536a4663c7f4cff2d4e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_324fc8ab164289507a8a9391d7056b15
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c35d41ad7464221b4b3a8c7f85fa8a5e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_71d50a7293caba9c14997027f9784f5a |
| publicationDate |
2018-05-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-I623039-B |
| titleOfInvention |
Semiconductor device and method of manufacturing same |
| abstract |
An embodiment of the present invention is a semiconductor device including: an oxide semiconductor film including a first region and a pair of second regions opposed to each other across the first region; and disposed on the oxide semiconductor film a gate insulating film; and a first electrode disposed on the gate insulating film and overlapping the first region, wherein the first region is a non-single-crystal oxide semiconductor region having a c-axis aligned crystal portion, and The second region is an oxide semiconductor region containing a dopant and having a plurality of crystal portions. |
| priorityDate |
2011-03-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |