http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I269408-B

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b2d32a1324eb3a240649ffee8d475d63
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242
filingDate 2005-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2006-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2a4414b868f7f9a2e11285702113503e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_37660544ea1c79c0f38175e0fd59f9c9
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4efbb1a59e63c6e29508d64921e6ce1a
publicationDate 2006-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-I269408-B
titleOfInvention Method of manufacturing a DRAM capable of avoiding bit line leakage
abstract A method to make DRAM capable of avoiding bit line leakage is provided. The method comprise the steps of forming transistors on substrate, forming an insulating layer to cover the substrate and the transistors, forming a poly-silicon layer over the insulating layer, forming contact holes in the poly-silicon layer and the insulating layer, the contact holes touching the substrate, filling the contact holes with a conducting layer, and etching the surface of the conducting layer with O2/O3 plasma or an etchant of H2SO4, H2O2 and HF.
priorityDate 2005-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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