http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I255044-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42384 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78615 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4908 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-84 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-772 |
| filingDate | 2005-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2006-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3db084b30f8764c2049d03ffc876a0a7 |
| publicationDate | 2006-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-I255044-B |
| titleOfInvention | SOI MOSFET device with reduced polysilicon loading on active area |
| abstract | Silicon-on-insulator (SOI) devices with reduced polysilicon loading on an active area uses at least one dielectric layer resistant to silicidation to separate at least one body contact region from source/drain regions, thus reducing gate capacitance and improving device performance. The SOI devices may be used in full depletion type transistor or partial depletion type transistor. |
| priorityDate | 2005-02-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.