Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9ec030fc062b270c25327af9127bed3a |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-13024 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05147 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05166 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0001 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05171 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-06131 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05573 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05664 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05655 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-02377 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05644 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05548 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-05 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-03 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-11 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-60 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3171 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5283 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-31 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-09 |
filingDate |
2000-12-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2006-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9799c73c4636176e14c6d77cef9180c8 |
publicationDate |
2006-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-I248141-B |
titleOfInvention |
Semiconductor device and manufacturing method therefor |
abstract |
An undercut portion is provided in the side surface of a wiring pattern formed over the electrode terminal forming surface of a semiconductor element so that when the top of the electrode terminal forming surface of the semiconductor element is sealed, a semiconductor device can be obtained wherein that sealing layer exhibits high adhesion. The side surface of the wiring pattern having this undercut portion can be obtained by forming the wiring pattern by laminating metal layers of a plurality of metals, in a layered form, in such a way that the side surface of at least a metal layer A of that wiring pattern is formed as recessed inward in comparison with the side surface of a metal layer B formed on or above that metal layer A. More specifically, the undercut portion can be obtained by performing wet etching on this side surface. |
priorityDate |
1999-12-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |