http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I241689-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0950e9df7f0e1b73efee1bda859951ad |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28097 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823864 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823842 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 |
| filingDate | 2003-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2005-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_57de1be492adcf34a5d0d62962dc7846 |
| publicationDate | 2005-10-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-I241689-B |
| titleOfInvention | Semiconductor device including insulated-gate field-effect transistor, and method for manufacturing the same |
| abstract | The present invention provides a semiconductor device including an insulated-gate MISFET having a gate structure with its threshold voltage easy to control and with its gate-insulating film high in reliability, and to provide a method for manufacturing the same. The device structure is such that an n-channel MISFET region and a p-channel MISFET region are formed, the n-channel MISFET has a first metal silicide film 115 for its gate electrode, and the p-channel MISFET has a second metal silicide film 119 for its gate electrode. After the formation of the first metal silicide film 115 in the gate electrode region, a first metal film 117 is formed in the p-channel MISFET region. A heat treatment follows, in which the first metal film 117 formed on the p-channel MISFET gate electrode is brought into a solid-phase reaction with the first metal silicide film 115 positioned thereunder for the conversion of the p-channel MISFET gate electrode into a second metal silicide film 119. |
| priorityDate | 2002-11-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 54.