http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I240966-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36d1d9c59848bff6ad5f55923d1290f5 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02074 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7684 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B24B37-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-304 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3212 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-306 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-304 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B24B37-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-321 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 |
| filingDate | 2004-04-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2005-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c4474f211aa74e559cd344bd16328a66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1f0013793aba22dcae03e73b4a77887b |
| publicationDate | 2005-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-I240966-B |
| titleOfInvention | Manufacturing method of semiconductor integrated circuit device |
| abstract | The technical subject of the present invention is to make the height of buried wiring within a certain range in the process of forming the buried wiring when burying the conductive film with Cu as the major component in the wiring slots formed on the insulative film regardless of the width and density for the wiring slots. The solution of the present invention is: during the CMP (chemical mechanical polishing) process for forming the buried wiring 23, and in the polishing of isolation conductor film 23A composed of Ta film, employing the polishing agent for the polishing speed of the lower insulative film 20 composed of SiO film at around 1/20 of the polishing speed of the isolation conductor film 23A as the slurry, which contains bubbles formed by non-uniform vesicating with the diameter above 150 mum and the density around 0.4 g/cm<3> to 0.6 g/cm<3>, and using the components as polishing pad formed with polyurethane in the hardness above 75 degree obtained from the E-type hardness tester based on JIS (Japan Industry Standard) K 6253. |
| priorityDate | 2003-07-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 36.