http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I238415-B
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4edd4e526605dbd18b513b4b30d19ab2 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0425 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115 |
filingDate | 2004-05-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2005-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2e6367b97aef4fdda43af04629e4cb0b |
publicationDate | 2005-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | TW-I238415-B |
titleOfInvention | Nonvolatile semiconductor memory device and control method therefor |
abstract | This invention is provided to remarkably shorten a data write time on a nonvolatile semiconductor memory device. In a nonvolatile semiconductor memory device according to this invention, a memory array is divided into a first memory cell array MAT having memory cells to be programmed to write true data in each of them and a second memory cell array MAR having memory cells to be programmed to write reversed data of the true data in each of them, a column decoder 20 is provided to simultaneously select a bit line BLtj connected with a memory cell Mtj in which true data is written and a bit line BLrj connected with a memory cell Mrj in which reversed data of the true data is written, and a differential amplifier 23 is provided to amplify the difference between two signals outputted to the pair of bit lines BLtj, BLrj and output the result to an I/O line 24. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I485702-B |
priorityDate | 2003-05-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 31.