| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c5520dd38cc403678d9f91e0b0ee95fb |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7887
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40114
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66825 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788 |
| filingDate |
2003-09-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2005-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ebf6191d087398720040fe0eb78d3059
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c412110a19b3d554158f0edd42eca9fa
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7c9268c2e3bc5006597d82c1444d9fbd
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b615417385a320ccaeb66964636ce11f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c038c9afa7b9a859bb5a21b0fd48b6c9 |
| publicationDate |
2005-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-I235383-B |
| titleOfInvention |
Semiconductor storage device and portable electronic equipment |
| abstract |
When an input voltage determining circuit 24 determines that an input voltage exceeds a prescribed voltage, a control circuit 25 of a positive polarity power selector circuit 22 turns on a first switch SW1 and turns off second and third switches SW2 and SW3, thereby supplying the input voltage to a memory cell array 21 via the first switch SW1. When the input voltage determining circuit 24 determines that the input voltage is not higher than the prescribed voltages'/the control circuit 25 turns off the first switch SW1 and turns on the second and third switches SW2 and SW3, thereby supplying a voltage from a charge pump 23 via the second and third switches SW2 and SW3. By this operation, the memory element is able to retain storage of two bits or more even if miniaturized, to execute stable operation with a small circuit area and to prevent circuit malfunction attributed to a small current supplied to the memory cell array. |
| priorityDate |
2002-09-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |