http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I231968-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8f063b8222ec3c8e746a415e7f364473 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76 |
| filingDate | 2004-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2005-05-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d4bbb00d52127a81806ccfaa96ab7771 |
| publicationDate | 2005-05-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-I231968-B |
| titleOfInvention | Methods of fabricating a deep trench capacitor and a dynamic random access memory |
| abstract | A method of fabricating a deep trench capacitor is provided. A substrate having a patterned mask layer exposing a deep trench in the substrate thereon is provided. Also, a bottom electrode is formed in the substrate around the bottom of the deep trench, and a capacitor dielectric layer is formed on the surface of the deep trench. A first conductive layer is filled in the bottom of the deep trench. A sacrificed layer is formed on the substrate and at least covering the surface of the mask layer. The substrate at the sidewalls of the deep trench exposed by the sacrificed layer and the first conductive layer is partially removed. A collar oxide layer is formed on the sidewalls of the deep trench exposed by the first conductive layer. A second conductive layer and a third conductive layer covering the second conductive layer are formed in the deep trench sequentially. |
| priorityDate | 2004-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 24.