http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I224387-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5dabfc7998cca69e04571256e5cb4e80 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-32145 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48227 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48228 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73265 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48 |
| filingDate | 2003-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2004-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1cfcaba054892ec23ea8b98cfdcacae6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_77bed484b9272981011a4c87b798d521 |
| publicationDate | 2004-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-I224387-B |
| titleOfInvention | Semiconductor package substrate with protective layer on pads formed thereon and method for fabricating the same |
| abstract | A semiconductor package substrate with a protective layer on pads formed thereon and a method for fabricating the same are proposed. An insulating layer is formed with a plurality of blind vias to expose an inner trace structure underneath the insulating layer. After a conductive film is formed on the surface of the insulating layer and the blind vias, a first resist layer is formed thereon with a plurality of openings to expose the conductive film. A patterned trace structure including a plurality of pads is formed within the openings and conductive blind vias are formed within the blind vias of the insulating layer by an electroplating process, wherein at least a pad is electrically connected to the conductive blind via. A second resist layer is partially formed on the patterned trace structure and a barrier metal layer is partially formed on the pads without covering the second resist layer by an electroplating process. After the second resist layer, the first resist layer, and the conductive film underneath the resist layer are removed, a solder mask is formed over the substrate with a plurality of openings formed to expose the pads. An organic solderability preservative layer is formed on the pads without covering the barrier metal layer, for providing a semiconductor package substrate with pads covered by either a barrier metal layer or an organic solderability preservative layer. |
| priorityDate | 2003-08-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.