Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4edd4e526605dbd18b513b4b30d19ab2 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-04042 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-45144 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-12032 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48463 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0605 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66143 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-872 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0814 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-05 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-329 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-872 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-47 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76 |
filingDate |
2002-10-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2003-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ee4c316737d77418bbbde5dba7b7f712 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3bc522871787239afefd26a162829b5b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d9e7af2b5434bd8462c43bcfcd1e4d70 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bf5585d052e8cc99764c50fb973a612e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_563aec0b6a1d8e3ba956c2519aa6364f |
publicationDate |
2003-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-561623-B |
titleOfInvention |
IC type Schottky barrier diode and process therefor |
abstract |
This invention provides an IC type Schottky Barrier Diode, having a plurality of Schottky Barrier Diodes isolated by insulation regions by ion planting. Thus the conventional undulated surface because of the trenches or polyimide and GaAs surface is avoided and the spacial margins for allowing slight misalignment of the masks are not required. As a result a significant reduction of the size of the chip and a simplified process are possible. |
priorityDate |
2001-10-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |