http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-561491-B

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0950e9df7f0e1b73efee1bda859951ad
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1072
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-143
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1006
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1063
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1051
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1078
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-20
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-20
filingDate 2002-06-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2003-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5575337bbdff223b313692b67ee1ec50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c01d3ca0645843158607bd4430342141
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6e35818ceeb90067d7431c27dd2b5658
publicationDate 2003-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-561491-B
titleOfInvention Semiconductor memory device
abstract A kind of semiconductor memory device is disclosed in the present invention. The invention is featured with containing plural memory chips MC1, MC2, and I/O (input/output) terminal 13, which is disposed in accordance with these plural memory chips. The I/O terminal, after the power source is plugged in, is capable of outputting a busy signal of busy state when the power source voltage reaches the guaranteed range in the specification, outputting a busy signal of maintaining busy state during the period before completing the initialization operations of plural memory chips, and outputting a busy signal of relieving busy state after completing the entire initialization operations of plural memory chips.
priorityDate 2001-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559589
http://rdf.ncbi.nlm.nih.gov/pubchem/taxonomy/TAXID56282
http://rdf.ncbi.nlm.nih.gov/pubchem/taxonomy/TAXID182111
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID415829060
http://rdf.ncbi.nlm.nih.gov/pubchem/anatomy/ANATOMYID56282
http://rdf.ncbi.nlm.nih.gov/pubchem/anatomy/ANATOMYID182111
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID132460
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID119434

Total number of triples: 33.