http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-543087-B
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fd83260a96356882b5f50dd097411a72 |
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S257-903 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S257-904 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B99-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B10-00 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8244 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 |
filingDate | 2002-04-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2003-07-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_64b7db95bfbb8c983e4402def0040bb5 |
publicationDate | 2003-07-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | TW-543087-B |
titleOfInvention | Semiconductor device |
abstract | The present invention relates to a semiconductor device having: a gate electrode which is formed on a first conductive-type well set in semiconductor substrate, with a gate insulating film lying therebetween; an LDD structure in which, on either side of said gate electrode, there are formed an LDD region which is a second conductive-type dopant diffusion region with a low dopant concentration and a source/drain region which is a second conductive-type dopant diffusion region with a high dopant concentration; an interlayer insulating film to cover said gate electrode as well as said section of LDD structure; and contact sections which are formed by filling up openings made in said interlayer insulating film with a conductive metal; wherein: a contact section connecting to one side of the source/drain regions having a potential equal to a potential of said first conductive-type well is disposed so as to come into contact with the LDD region lying on this side of the source/drain regions; and a contact section connecting to the other side of the source/drain regions having a potential different from the potential of said first conductive-type well is disposed so as not to come into contact with the LDD region lying on this side of the source/drain regions. The present invention can develop technology capable to reduce the memory cell area while suppressing the generation of the leakage, and provide a semiconductor memory device of high integration with excellent element characteristics having a low standby current. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I781421-B |
priorityDate | 2001-04-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 37.