http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-541799-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fd83260a96356882b5f50dd097411a72 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-089 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0814 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-089 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-081 |
| filingDate | 2002-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2003-07-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_195d0383f923be020c78e73dd6e5ced7 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6156e2001a487b0ec0d75e929fab19b4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b48bdd09d43300ee17ee097b1cd93120 |
| publicationDate | 2003-07-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-541799-B |
| titleOfInvention | Clock-control circuit |
| abstract | A clock-control circuit with reduced circuit size is provided. Said clock-control circuit includes: ring-counter 100, with output N its signal and its complementary signal; estimation-outer-rescue and flag-generation circuit 150, which rescues the estimation-outer pattern and generates the flag-signal JBTFLG corresponding to the combination of the 2N bits signal; decoder-circuit 160; clock-select 170, which outputs the clock-pair from multi-phase clocks based on the selection-control signal from said decoder-circuit; interpolator 130, which outputs the delayed signal corresponding to the time which has interpolated the phase-difference of the clock-pair; phase-comparator 110, which compares the phases of the output of the interpolator and the base-clock; interpolator-control circuit 120, which outputs the interpolation-ratio control signal which sets the interpolation-ratio of the interpolator based on the phase-comparison result from said phase-comparator and the flag-signal JBTFLG, the counting-direction is changed. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103795408-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103795408-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8248126-B2 |
| priorityDate | 2001-05-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23663977 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID448103523 |
Total number of triples: 25.