http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-531827-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_260220c525b214105ee48ee2d77a5bf4 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7681 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76828 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76829 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76825 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5329 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76832 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76835 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76849 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76808 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-027 |
| filingDate | 2000-06-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2003-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_83089601c97eff3d8f8c772f45d0b08f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6f70ac84d5fad92311983717752dd93f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_77814ba3ce00f6fff1629c8de45e0379 |
| publicationDate | 2003-05-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-531827-B |
| titleOfInvention | Integrated circuits with multiple low dielectric-constant inter-metal dielectrics |
| abstract | The invention provides processes for the formation of structures in microelectronic devices such as integrated circuit devices. More particularly, the invention relates to the formation of vias, interconnect metallization and wiring lines using multiple low dielectric-constant inter-metal dielectrics. The processes use two or more dissimilar low-k dielectrics for the inter-metal dielectrics of Cu-based dual damascene backends of integrated circuits. The use of both organic and inorganic low-k dielectrics offers advantages due to the significantly different plasma etch characteristics of the two kinds of dielectrics. One dielectric serves as the etchstop in etching the other dielectric so that no additional etchstop layer is required. Exceptional performance is achieved due to the lower parasitic capacitance resulting from the use of low-k dielectrics. An integrated circuit structure is formed having a substrate; an inorganic layer on the substrate which is composed of a pattern of metal lines on the substrate and an inorganic dielectric on the substrate between the metal lines; and an organic layer on the inorganic layer which is composed of an organic dielectric having metal filled vias therethrough which connect to the metal lines of the inorganic layer. |
| priorityDate | 1999-06-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 38.