| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fd83260a96356882b5f50dd097411a72
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5547f741b25666fc4ae5195cf71a979b |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-401
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2029-0403
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-72 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-783
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-24
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-50016
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-406
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-50 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-24
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-401
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-406
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-50 |
| filingDate |
2001-10-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2003-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_801c71aefe05e8e2a843f60f7c3cda8a |
| publicationDate |
2003-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-529029-B |
| titleOfInvention |
Semiconductor memory device and method for its test |
| abstract |
A semiconductor memory device and method for its test is disclosed including a CBR (CAS before RAS) refresh test achieved by inputting a CBR command for every redundant word line to be selected. In this way, redundant word lines may be selected without repetition until all of the redundant word lines have been selected. By doing so, an accurate determination of the refresh period may be obtained. A CBR refresh counter (15) may be activated every time a control signal is received when a refresh test on redundant memory cells (RC) is performed. Redundant counter signals (RCNT0 to RCNT5) may be applied to a X address buffer (2A). X address buffer (2A) may select the redundant counter signals (RCNT0 to RCNT5) to sequentially select the redundant word lines (RWL0 to RWL63) when a redundant refresh test is performed. |
| priorityDate |
2000-10-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |