http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-518715-B

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
filingDate 2001-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2003-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_24aa0a6afac8d2aa749bf84901a8dd04
publicationDate 2003-01-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-518715-B
titleOfInvention Method of forming metal wiring in a semiconductor device
abstract There is disclosed a method of forming a metal wiring in a semiconductor device. In the process technology in which a copper wiring is formed by means of CECVD method by which a chemical enhancer layer for increasing the deposition speed of copper is formed and the damascene pattern is filled by means of MOCVD method using a copper precursor in order to improve a low deposition speed in the process technology by which a damascene pattern of an ultra-fine structure is filled with copper by CVD method, the chemical enhancer layer risen to the surface of copper after deposition of copper functions to lower the characteristic of a copper wiring since the chemical enhancer has a high electrical resistivity characteristic though it accelerates deposition of copper. In order to prevent this problem, the present invention deposits copper by CECVD method and then removes the chemical enhancer layer risen to the surface of copper by plasma process. Therefore, the present invention can rapidly and easily fill with copper an ultra-fine damascene pattern and also maximize an electrical characteristic of a copper wiring.
priorityDate 2001-06-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 27.