http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-511095-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-70 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-00 |
| filingDate | 2001-06-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2002-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eca07ea094efd9e80c1566fb85bf4ebb |
| publicationDate | 2002-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-511095-B |
| titleOfInvention | Semiconductor memory device having row repair circuitry |
| abstract | The disclosure is a semiconductor memory device cooperated with row repair circuitry by which defective wordlines are substituted with redundant wordlines regardless of locations of cell array blocks, the redundant wordlines being arranged in a specific cell array block. The semiconductor memory device includes a plurality of memory blocks at least one of which includes a plurality of redundant wordlines; a plurality of row repair fuse boxes the number of which is the same with the number of the redundant wordlines, the fuse boxes being divisionally arranged with the same number respective in the memory blocks; and repair means to repair a defective wordline with the redundant wordline, the redundant wordlines corresponding to the row repair fuse boxes each by each. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7782286-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8040336-B2 |
| priorityDate | 2000-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 18.