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filingDate 2000-01-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2002-07-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0844567b78ff360ccd4ee243aa8d895a
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publicationDate 2002-07-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-495987-B
titleOfInvention Semiconductor integrated circuit and non-volatile memory device
abstract Semiconductor integrated circuit and non-volatile memory device are introduced. It can enhance the data retention capability of a memory unit that is composed by a pair of differential state non-volatile memory device. The flash memory (130) uses the gate oxide (GT2) and gate (GT2) process of the transistor in the same substrate to form tunnel oxide (GT3) and floating gate (FGT) respectively. The pair of non-volatile memory device composing the memory unit is respectively connected to a pair of complementary data lines and two units are set to be one bit. The threshold voltages of the two memory units are different and are read differentially. When in the read mode, the word line voltage is set to be about equivalent to the threshold voltage in the thermal equivalence state (initial threshold voltage) and in the same time to be about equivalent to the average of high and low threshold voltages. So the data retention performance is persisted and reduces the read failure rate.
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