http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-492089-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_57341227c065dbddd1d3cf801bbaa86a |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
| filingDate | 2001-07-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2002-06-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9dbcd1800923844adcd4e5dd926dfacf |
| publicationDate | 2002-06-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-492089-B |
| titleOfInvention | Flash memory with conformal floating gate and its manufacturing method |
| abstract | This invention provides a flash memory with conformal floating gate and its manufacturing method, which includes: providing a substrate containing trench; forming a tunnel oxide layer on the surface of the substrate adjacent to the trench; forming high isolation filler in the trench, which protrudes from the surface of the substrate to create cavity between two adjacent high isolation fillers; forming a floating gate on the surface of the cavity with an U-shape cross-section structure, in which the high level plane of the U-shape structure is the same as the high isolation filler; forming an isolation structure on the top of the high isolation filler and upper surface of the U-shape structure; forming a conformal dielectric layer on the surface of the floating gate and the isolation structure; and finally, forming a control gate on the dielectric layer. |
| priorityDate | 2001-07-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 20.