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filingDate 2000-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2002-02-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2002-02-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-477060-B
titleOfInvention Dynamic RAM and semiconductor device
abstract A dynamic RAM includes: a plurality of word lines connected to the address selection terminals of a plurality of dynamic memory cells; a plurality of complementary bit line couples connected to respective input/output terminals of the dynamic memory cells, and arranged in mutually opposite directions; and a sense amplifier string formed of a plurality of latch circuits, to which operation voltage is given corresponding to the operation timing signal and amplifies the voltage difference of the complementary bit line pairs. Common electrodes opposite to a storage node serve as the connection point of address selective MOSFET of the dynamic memory cells, installed on both sides with the sense amplifier string as a center. And an information storage capacitor are mutually connected, while circuit connections in the sense amplifier string are connected by a wiring system of latch circuits using common electrodes.
priorityDate 1999-10-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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