http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-472377-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-50 |
| filingDate | 1999-01-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2002-01-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_27d5e02520f3050ff3402fd7bc1a17f6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c12c5b9338b2ab0a86bc203b2928e62b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ef96565861414b4f7c1ba6f600040c19 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7eb213879a3d808876e13769e95d55d7 |
| publicationDate | 2002-01-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-472377-B |
| titleOfInvention | Method to prevent copper wire from being damaged by polishing or etching |
| abstract | In the current multi-level interconnect process, copper dual damascene interconnect technology has been getting more important. Because copper material has poor gap filling capability, planarization process is employed in dual damascene process. Impaired conductivity or even open circuit may occur due to damage on the copper wiring at isolated area or open field after planarization polishing treatment or subsequent etching process by using clean solution. This invention provides a modified process suitable for copper wiring technology. It is able to reduce copper wire damage from polishing treatment or clean solution etching by: (1) a dummy pattern at the outside of the copper wire and near isolated area or open field; (2) an end cap structure in the copper wire; or (3) increased line width of the copper wire. |
| priorityDate | 1999-01-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 27.