http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-466734-B

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8244
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522
filingDate 1999-01-08-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2001-12-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c64f08e952970cd39508602c2498b325
publicationDate 2001-12-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-466734-B
titleOfInvention Small sized semiconductor device with shared contact plug
abstract A method for producing a small sized SRAM comprises at least a shared contact plug. The method comprises: forming a gate oxide layer and a polysilicon on the surface of a semiconductor substrate as a gate of a SDRAM; forming a dielectric layer on the periphery of the gate, in which the cross-section of the upper layer of the gate is not covered by an oxide layer, and in which one side of the gate sidewall free of a spacer is also not covered by a dielectric layer; forming a gate sidewall on the silicon nitride spacer, in which a gate sidewall has only a spacer; forming a heavily doped ion region in the semiconductor substrate between the two gates, and a lightly doped drain region between the spacer bottom of the gate sidewall and the semiconductor substrate; forming a silicide on the gate and the source/drain, in which the portion of the gate sidewall having no a spacer is also covered with a silicide layer; forming an inter-metal dielectrics on the surface of the chip, and etching out a shared contact plug between the gate and the source/drain diffusion region.
priorityDate 1999-01-08-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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