http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-455999-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_628db03ba4f8948ecd211fb3d46b9ef4 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823842 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26513 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2658 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66575 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-265 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate | 2000-08-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2001-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e41a31ab1a75813d2b7e6adbd2d5ac86 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bf5d7c02aa9523d03dce3e6303e54db2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_80cf9d246dbc901d8abdfe6782cb6d66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_67055fe2606f804ac58da51cb72316ec |
| publicationDate | 2001-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-455999-B |
| titleOfInvention | Method of raising the anti-penetration effects of boron for dual gate complementary metal oxide semiconductor transistors |
| abstract | The present invention relates to a kind of method for raising the anti-penetration effects of boron for dual gate complementary metal oxide semiconductor (CMOS) transistors. At first, boron ions (B+) are implanted into the polysilicon layer as the gate doping of p-type transistor in order to avoid the fluorine ion accelerated boron penetration effects. After completing the definition of gate electrode by etching the polysilicon layer, boron difluoride (BF2+) is implanted to form the extending region of source/drain (or source/drain doping) in order to complete a super shallow junction. The gate photoresist of previously defined gate pattern can exactly block the penetration of boron difluoride into the gate electrode such that the self-aligned effect is obtained and no extra mask or process is required. In this manner, not only the capability of resisting the effects of boron penetration for the p-type device of dual gate CMOS transistors is increased, but also the effect of super shallow junction can be completed through the use of boron difluoride, in which the effects will be even prominent if the nitrogen treatment of gate oxide layer is used together. This method is greatly helpful for the improvements of device reliability and yield control. |
| priorityDate | 2000-08-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 40.