http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-449896-B
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fd446fb0d73aa96d044fea2eaa3c8ebc |
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-09701 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T428-24744 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-0272 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T428-24661 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-0306 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T428-24562 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T428-24331 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S428-901 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-072 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-0655 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-427 |
classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-03 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L25-07 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L25-065 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-427 |
filingDate | 1997-07-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2001-08-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_12d438e4c43247c7e576b70a0c49ce81 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7c2eed2c5d890004c2ca07e2ff0a62fd |
publicationDate | 2001-08-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | TW-449896-B |
titleOfInvention | Arrangement for heat dissipation in chip modules on multilayered ceramic carriers, in particular multichip modules |
abstract | The invention relates to an arrangement for heat dissipation in chip modules on multilayered ceramic carriers, in particular multichip modules. Openings for a heat-conducting medium are provided in the ceramic carrier. The multilayered ceramic carrier (2) is applied to a metal cooling structure (1). Thermal openings (6), in particular in the form of a hole pattern or array, are provided in the uppermost layer (L1) of the multilayered ceramic carrier, in the region of the chips (3) to be applied. In the next layer (L2) of the multilayered ceramic carrier underneath said uppermost layer, and a bowl-shaped recess (8), which acts as the condenser and is in the region of the chip to be applied, is provided in the metal cooling structure (1). The layers (L3-L7) of the multilayered ceramic carrier which are between the evaporation chamber (7) and the condenser (8) are in the region of said chambers with a complete number of large-surface steam passages (DK1-DKn) and small-surface condensate channels (KK0-KKn) acting as capillaries and connecting the two chambers to each other. Said arrangement forms a miniature heat-pipe structure which can convey a great deal of energy for short distances per unit of time. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9807914-B2 |
priorityDate | 1996-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 37.