http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-445520-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-265 |
| filingDate | 2000-03-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2001-07-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e94fe90e903bba9e2795bb35ccf93cc8 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_25c640e2b6a95447382e2bb26c855cf5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dcc3ff47210359c0d95217e369f28cd8 |
| publicationDate | 2001-07-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-445520-B |
| titleOfInvention | Method for manufacturing I/O devices on semiconductor substrate |
| abstract | The present invention discloses a method for manufacturing I/O devices on semiconductor substrate, which comprises the steps of: (a) providing a semiconductor substrate formed thereon a gate structure; (b) using thermal oxidization method to form a mask oxidization layer on the sidewall of the gate and the surface of the substrate; (c) performing a first ion implantation process to form a lightly doped source/drain region on the substrate at two sides of the gate structure; and (d) performing a second ion implantation process to implant N<SP>+</SP> or N2<SP>+</SP> ions in the substrate close to the interface of the mask oxidization layer. By implanting the N<SP>+</SP> or N2<SP>+</SP> ions, the present invention not only improves the quality of the Si/SiO2 interface, but also forms a smooth doping outline, thereby improving the hot carrier effect caused by operating the device in a high voltage. |
| priorityDate | 2000-03-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.