http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-434858-B

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-495
filingDate 1998-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2001-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_98f9c0fca6873b5c72a5219dccf4efbe
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_109b37b67896f0c07b38b8d0cac5f490
publicationDate 2001-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-434858-B
titleOfInvention Package and method for dual chips
abstract A package structure and method for dual chips in which the upper and lower surface of the chip socket have a chip each on the lead frame, wherein both chips have a plurality of pads. One of the chips has bumping redistribution structure for redistributing the pad locations on the chip to move to the locations corresponding to the original pad locations. While connecting the pins of the lead frame with the two chips via leads, because the pad location after movement is matched with the pad location on another chip, the leads will not be crossed or wound together during packaging so as to smoothly connect the chip with the pins.
priorityDate 1998-11-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 20.