http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-427014-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76807 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-033 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-91 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 |
| filingDate | 1997-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2001-03-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2d39463270367a274534b42a2d1c2d0f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_47d846db1dbb21cde8749bc5ef78c372 |
| publicationDate | 2001-03-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-427014-B |
| titleOfInvention | The manufacturing method of the capacitors of DRAM |
| abstract | A manufacturing method of the capacitors of DRAM is as follows. First, form the first oxide layer, a silicon nitride layer, the second oxide layer and the first polysilicon layer sequentially on the silicon substrate of the CMOS device. Then, form a photoresist layer on the surface of the first polysilicon layer to define the outer frame of the capacitor. Then etch the first polysilicon layer and the second oxide layer, the etching will stop at the silicon nitride layer. Afterwards, remove the photoresist layer, and deposit a third oxide layer on top of the surface of the substrate. Furthermore, etch the third oxide layer, the etching will stop at the silicon nitride layer. Then proceed the steps of etching the silicon nitride layer and etching the first oxide layer to expose the silicon substrate. Then form the second polysilicon layer and the fourth oxide layer on the surface of the silicon substrate. Afterwards, polish the fourth oxide layer, the second polysilicon layer and the first polysilicon layer by chemical-mechanical polishing and stop after removing the first polysilicon layer. Then remove the remaining fourth oxide layer and the second oxide layer by wet etching by using the silicon nitride layer as the etching stop layer. Furthermore, form an insulating layer on the surface of the silicon substrate and form the third polysilcon layer on the surface of the insulating layer. |
| priorityDate | 1997-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.