http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-417319-B

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e5a665ce251793344ba4bfe2afb6c294
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-00
filingDate 1999-08-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2001-01-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2118fa3cc385341c3fa62aefa5b4bca5
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5f74b4fc535bb4df683f604a3f6131f9
publicationDate 2001-01-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-417319-B
titleOfInvention Semiconductor light emitting device having a pair of carrier current masks
abstract There is provided a semiconductor light emitting device having a pair of carrier current masks, comprising: a semiconductor substrate, a pair of carrier current masks, a flowing path for controlling the injected carrier current, a double heterostructure layers, a contact layer for protecting the double heterostructure layers, and a window layer with a high transmittivity and low resistance. The upper and lower faces of the semiconductor light emitting device are formed by a pair of corresponding cladding electrode plates. The carrier current masks comprises a first and a second carrier current masks. The first carrier current mask is located in the center or two sides of the surface layer of the semiconductor substrate. The first carrier current is of a high resistive oxide layer or semiconductor material having an inverse conductivity with the semiconductor substrate, and its area is smaller than that of the semiconductor substrate. The second carrier current mask is located on the upper surface layer of the contact layer, and its size and location are corresponding to those of the first carrier current mask. The second carrier current mask is of a high resistive oxide layer or semiconductor material having an inverse conductivity with the contact layer. In addition, the size and location of the second electrode plate are also aligned with those of the first carrier current mask. The contact layer is composed of GaAsxP1-x, where 0<x<1. The window layer is of oxide zinc-aluminum or oxide indium-tin with a high transmittivity and low resistance.
priorityDate 1999-08-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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