http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-415087-B
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 |
filingDate | 1999-04-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2000-12-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2c9c1fd737f6551b89f6ebad353ca298 |
publicationDate | 2000-12-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | TW-415087-B |
titleOfInvention | Fabrication method for storage electrode with porous and rugged side wall of DRAM capacitor |
abstract | The procedures in forming capacitor in the invention are as follows; firstly form the first dielectric layer on a substrate; form the second dielectric layer on the first dielectric layer; form the third dielectric layer on the second dielectric layer; then pattern the third dielectric layer, the second dielectric layer and the first dielectric layer to form contact holes inside of them; then form the doped polysilicon layer inside the contact hole and on the third dielectric layer; form the fourth dielectric layer on the doped polysilicon layer; pattern the fourth dielectric layer and the doped polysilicon layer to define the storage electrode; further form the Hemispherical Grain (HSG) layer on the fourth dielectric layer, the side wall of the doped polysilicon layer and the third dielectric layer; then etch the HSG layer to define plural holes among grains of HSG layer and expose the fourth dielectric layer through the plural holes; etch the fourth dielectric layer and doped polysilicon layer underneath through the plural holes; remove the fourth dielectric layer and the third dielectric layer; form the fifth dielectric layer on storage electrode; and finally form the conducting layer on the fifth dielectric layer. |
priorityDate | 1999-04-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 27.