http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-402793-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823842 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-49 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-40 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 |
| filingDate | 1998-12-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2000-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6b4b41ecd65bf5235f9ab54085444a8d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e95988f06a38c29904d4855490168775 |
| publicationDate | 2000-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-402793-B |
| titleOfInvention | Flash memory manufacture method |
| abstract | This invention discloses a manufacture method of the flash memory, which comprises the steps of: dividing a P typed silicon substrate having N well and field oxide into the PMOS, NMOS and flash memory region; forming a first polysilicon layer and a first oxide on the flash memory region; forming a second polysilicon layer, a second oxide and TEOS layer; forming a flash memory unit array with the first photoresist; proceeding an N<+> doping to the source/drain region of the flash memory; after peeling-off the first photoresist, forming a gate structure of the NMOS region with the second photoresist and proceeding N<-> doping to form the LDD in the NMOS region; after peeling-off the second photoresist, forming a first spacer, and proceeding the N<+> heavy doping of the NMOS source/drain region; forming the gate structure of the PMOS region, and peeling off the third photoresist after the LDD step of the PMOS source/drain region; and forming a second spacer oxide, and utilizing the fourth photoresist to form and implant the P<+> source/drain region and to peel off the fourth photoresist. |
| priorityDate | 1998-12-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.